
Stands for "Complementary Metal Oxide Semiconductor." It is a technology used to produce integrated circuits. CMOS circuits are found in several types of electronic components, including microprocessors, batteries, and digital camera image sensors.
The "MOS" in CMOS refers to the transistors in a CMOS component, called MOSFETs (metal-oxide semiconductor field-effect transistors). The "metal" part of the name is a bit misleading, as modern MOSFETs often use poly-silicon instead of aluminum as the conductive material. Each MOSFET includes two terminals ("source" and "drain") and a gate, which is insulated from the body of the transistor. When enough voltage is applied between the gate and body, electrons can flow between the source and drain terminals.
The "complementary" part of CMOS refers to the two different types of semiconductors each transistor contains — N-type and P-type. N-type semiconductors have a greater concentration of electrons than holes or places where an electron could exist. P-type semiconductors have a greater concentration of holes than electrons. These two semiconductors work together and may form logic gates based on how the circuit is designed.
CMOS Working Principle
In CMOS technology, both N-type and P-type transistors are used to design logic functions. The same signal which turns ON a transistor of one type is used to turn OFF a transistor of the other type. This characteristic allows the design of logic devices using only simple switches, without the need for a pull-up resistor.
In CMOS, logic gates a collection of n-type MOSFETs is arranged in a pull-down network between the output and the low voltage power supply rail (Vss or quite often ground). Instead of the load resistor of NMOS logic gates, CMOS logic gates have a collection of p-type MOSFETs in a pull-up network between the output and the higher-voltage rail (often named Vdd).
Thus, if both a p-type and n-type transistor have their gates connected to the same input, the p-type MOSFET will be ON when the n-type MOSFET is OFF, and vice-versa. The networks are arranged such that one is ON and the other OFF for any input pattern as shown in the figure below.
