1. Overview of Digital Design with Verilog HDL
   ●  Evolution of Computer-Aided Digital Design
   ●  Emergence of HDLs
   ●  Typical Design Flow
   ●  Importance of HDLs
   ●  Popularity of Verilog HDL
   ●  Trends in HDLs

2. Hierarchical Modeling Concepts
   ●  Design Methodologies.
   ●  4-bit Ripple Carry Counter
   ●  Modules
   ●  Instances
   ●  Components of a Simulation
   ●  Lexical Conventions
   ●  Data Types
   ●  Example

3. Modules and Ports
   ●  Components of a Module
   ●  Ports
   ●  Hierarchical Names

4. Gate-Level and Data-Flow Modeling
   ●  Gate Types
   ●  Continuous Assignment
   ●  Expressions, Operators and Operands

● Operator Types ● Examples

1. Behavioral Modeling
   ●  Structured Procedures
   ●  Procedural Assignments
   ●  Conditional Statements
   ●  Examples

2. Finite State Machine
   ●  Mealy vs Moore state machine
   ●  FSM1 - Two always blocks with continuous outputs
   ●  FSM2 - Two always blocks with combined output assignments
   ●  FSM3 - Three always blocks coding style
   ●  Sequence Detector - Overlapping and Non-overlapping

3. FPGA Architecture
   ●  Introduction
   ●  Naming of Xilinx FPGA
   ●  Building blocks of FPGA
   ●  Overview of Xilinx FPGA Families
   ●  Building blocks of CLB’s
   ●  Types of slices
   ●  Building blocks of slices
   ●  I/O and clock network
   ●  RAM and DSP Slices
   ●  Additional FPGA Features8. Projects
   ●  LED Blinker
   ●  Display Values on Seven Segment Display
   ●  Counter on LEDs
   ●  Counter on Seven Segment Display