Thesis and Research Paper

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Low Power Current Mirror circuit





MOSFET has been the heart of the VLSI design from the last few decades till the present era. Physically it is a four terminal device but mostly only three terminals are being employed for practical applications. The bulk has been traditionally used as a substrate. Many approaches have been reported in literature for utilizing bulk as an additional control terminal in collaboration with the gate terminal. Now the theoretical aspects have classified MOSFETS basically as traditional SoI (Silicon on Insulator) MOS and Bulk MOS. From the operating point of view analysis in terms of region of operation among cut-off, sub threshold and saturation needs to be known prior to applications. Threshold voltage of MOSFET is the prominent parameter for turning the device on or off and depends on several factors such as bulk potential. This paper reviews the basic aspects of MOSFETS with respect to bulk terminal. A detailed analysis of effect of bulk potential on the characteristics of current mirror has been analysed. A tabular analysis in terms of transfer characteristics using parametric analysis of threshold voltage with variation of VGS (gate to source voltage) and VDS (drain to source voltage) has been presented using Cadence Virtuoso tool on the 180nm feature technology.

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